Paper introduces EMiX, an open-source multi-FPGA framework that partitions RISC-V designs across interconnected FPGAs without RTL redesign.
Key Takeaways
EMiX partitions monolithic multi-core RTL and distributes it across multiple Alveo U55c FPGAs, exploiting inter-FPGA interconnects for scalability.
Prototype runs a 64-core RISC-V architecture across eight FPGAs, successfully booting Linux as a full-system validation.
No fundamental RTL redesign required, lowering the barrier for teams already doing single-FPGA emulation.
Framework is scalable on both core count and FPGA count; open-source release planned.
Presented at RISC-V Summit EU 2026; preprint on arXiv (cs.AR).
Hacker News Comment Review
One commenter drew a direct comparison to Veloce, a commercial hardware emulation platform, framing EMiX as an academic equivalent to established industry tooling.
