RandomX makes Monero mining run random CPU programs over a 2 GiB dataset, deliberately mimicking general CPU workloads to resist ASIC specialization.
Key Takeaways
RandomX chains 8 random 256-instruction VM programs per hash; output of each seeds the next, blocking selective skipping of easy programs.
Two memory structures work simultaneously: a 2080 MiB dataset forces DRAM traffic; a 2 MiB scratchpad mirrors L1/L2/L3 cache behavior.
The key K (from an older block hash) rebuilds the heavy dataset only every ~2048 blocks (~2.8 days); miners iterate on per-nonce input H continuously.
Fast mode (2080 MiB) targets miners; light mode (256 MiB cache only) targets verifiers, with the tradeoff explicitly designed to make light mode uncompetitive for mining.
JIT compilers for x86-64, ARM64, and RISCV64 are included in the reference implementation, running VM programs as native code rather than interpreted.
Hacker News Comment Review
Commenters confirm RandomX has worked as designed since 2019: dominant hardware is AMD Ryzen CPUs and Apple M-series; Bitmain’s “Monero ASIC” is just RISC-V cores (Sophon SG2042 SOCs) with no special advantage.
The core ASIC-resistance argument was distilled clearly: designing a RandomX ASIC requires building a general-purpose CPU, and the repeated execution of each program amortizes ISA-translation overhead, shrinking any efficiency edge.
Some commenters questioned whether branching truly blocks optimization, asking why miners couldn’t generate branchless programs; responses noted the program seed is deterministically derived from block data, removing miner control over program shape.
Notable Comments
@hyc_symas: Confirms real-world success and notes Bitmain’s “ASIC” is just RISC-V cores, “there’s nothing special or m[agical about it].”
@dgacmu: Points to history of GPU/ASIC-resistant PoW being “long and mostly unsuccessful” and links a 2014 writeup on CryptoNight’s predecessor failures.
